This invention relates to a packaged semiconductor device and a method of manufacturing packaged semiconductor devices, and more particularly to a technology for improving the heat dissipation capability of, for example, a semiconductor integrated circuit device (hereinafter referred to as an IC device) which is capable of handling high voltages and large currents and which is required to have a high heat dissipation capability.
With the increasing number of functions, higher component density, and increasing speed of IC devices in recent years, there has been a requirement for development of so-called power IC devices capable of handling high voltages and large currents In such power IC devices, the improvement of the heat dissipation (radiation) property is an important technical target eagerly pursued.
Examples of IC devices with fine heat dissipation property are disclosed in the following references.
A first one is JP-A No. 63-296345 (laid-open on Dec. 2, 1988). This laid-open patent application discloses a film carrier which comprises an insulating film, a plurality of electrodes formed on the insulating film, and a conductor pattern which also serves for heat dissipation. In this published patent application, a film carrier has the above-mentioned electrodes and semiconductor devices bonded together at substantially the center areas of the film. The above-mentioned conductor pattern formed by a part of the conductor pattern comprises a heat dissipator provided at the center of the insulating film, a little separated from the surface of the semiconductor device, in such a manner as to cover the device surface, and heat dissipation pieces connected with this heat dissipator extend up to the peripheral edges of the insulating film. The above-mentioned device surface and the above-mentioned heat dissipation pattern are fixed together in resin molding.
A second one is JP-A No. 2-63143 (laid-open on Mar. 2, 1990). This laid-open pattern application concerns a resin-molded package of a. semiconductor device made by Tape Automated Bonding (TAB), and this semiconductor device package has the metal or ceramic pieces bonded to the rear side thereof and extending beyond the device surface Since the TAB method is used for this semiconductor device, the metal pieces about 0.035 mm to 0.07 mm.
What is collectively referred to as a third case are JP-A No. 2-114658 (laid-open on Apr. 26, 1990), JP-A No. 60-137041 (laid-open on Jul. 20, 1985), JP-A No. 60-37042 (laid-open on Jul. 20, 1985), JP-A No. 2-37756 (laidopen on Feb. 7, 1990), and JP-A No. 2-58243 (laid-open on Feb. 27, 1990).
In any of these laid-open patent applications, a semiconductor device having the following features is disclosed. That is to say, in this semiconductor device, the semiconductor pellet (hereafter referred to as a pellet) has an integrated circuit configured in the first principal surface and also has a plate-like heat dissipator mounted by using a resin.
In the prior art, however, not only there is a limit to the development of the heat dissipation performance, but also there are many other hurdles, which include the need to prevent the device from being contaminated by adhesives used, the need to take measures against the cost increase due to the use of polyimide film, and the limited compatibility of the assembly equipment between bonding of leads to a semiconductor pellet and bonding of heat dissipation means to the semiconductor pellet. Consequently, problems arise as follows.
(1) It is difficult to secure the quality and the reliability of low thermal resistance IC devices. PA1 (2) It is difficult to reduce the cost. PA1 (3) It is difficult to carry out an integrated manufacture.